Reconfigurable computing for agile, high-performance systems design and verification.

Recent Highlights

• February 2026
  Paper "Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing" accepted by DAC'26.
• November 2025
  Paper "TurboFuzz: FPGA Accelerated Hardware Fuzzing for Processor Agile Verification" accepted by HPCA'26.
• May 2025
  Mr. Shuoxiang Xu successfully passed the Master Viva.

Myself and My Research Focus

I received my PhD in digital computing from Imperial College London, in 2015. Then worked at Intel UK R&D center as an SoC Design Engineer, with a focus on developing FPGA-based SmartNIC/DPU/IPU and their applications in cloud data centers.

Since 2021 I joined the Institute of Computing Technology, Chinese Academy of Sciences as an Associate Professor.

My current research interests include agile chip design and verification, and custom computing using reconfigurable hardware such as FPGAs.