News

Updates on academic activities, publications, student milestones, and community events.

  • February 2026
    Paper "Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing" accepted by DAC'26. Congratulations to all my co-authors!
  • November 2025
    Paper "TurboFuzz: FPGA Accelerated Hardware Fuzzing for Processor Agile Verification" accepted by HPCA'26. Congratulations to all my co-authors and see you in Sydney!
  • May 2025
    Mr. Shuoxiang Xu successfully passed the Master Viva. Congratulations to Shuoxiang!
  • April 2025
    Four posters accepted by RISC-V Summit Europe 2025. See you in Paris!
  • April 2025
    Paper on SmartNIC-accelerated image provisioning accepted by USENIX ATC 2025. Congratulations to all my co-authors!
  • December 2024
    Two full papers on agile HLS verification accepted by FPGA 2025. Congratulations to all my co-authors!